Error Analysis and Adaptable Error-correct Scheme for NAND Flash Memory

Polar-Coded Forward Error Correction for MLC NAND Flash Memory Polar FEC for NAND Flash Memory

With the ever-growing storage density, high-speed, and low-cost data access, flash memory has inevitably become popular. Multi-level cell (MLC) NAND flash memory, which can well balance the data density and memory stability, has occupied the largest market share of flash memory. With the aggressive memory scaling, however, the reliability decays sharply owing to multiple interferences. Therefor...

ERRoR ANAlysIs AND RETENTIoN-AwARE ERRoR MANAgEMENT FoR NAND FlAsh MEMoRy

With continued scaling of NAND flash memory process technology and multiple bits programmed per cell, NAND flash reliability and endurance are degrading. In our research, we experimentally measure, characterize, analyze, and model error patterns in nanoscale flash memories. Based on the understanding developed using real flash memory chips, we design techniques for more efficient and effective ...

Error Control Coding for Flash Memory

Error control code (ECC) is extensively used in high-speed wireless/wired communication system, magnetic disk, and optical disc (Lin & Costello, 2004). Also the ECC can efficiently improve data reliability of semiconductor memory system (Fujiwara, 2006). This chapter presents error control coding techniques for flash memory and solid-state drive (SSD). This chapter begins with brief introductio...

Low energy error correction of NAND Flash memory through soft-decision decoding

The raw bit error rate of NAND Flash memory increases as the semiconductor geometry shrinks for high density, which makes it very necessary to employ a very strong error correction circuit. The soft-decision-based error correction algorithms, such as low-density parity-check (LDPC) codes, can enhance the error correction capability without increasing the number of parity bits. However, soft-dec...

Evolving throughput driven architecture for error correction in NAND memory